Power management devices are often used in discrete low-voltage applications. Conventional power management devices often include trench vertical double-diffused metal-oxide semiconductor (“VDMOS”) devices. These trench VDMOS devices have recently been adapted to include trench MOS Schottky barrier (“TMBS”) devices, which can be used to provide low forward voltage drops and increased switching speeds.
A TMBS device typically represents a synthesis of planar Schottky and trench technologies that produces a reduction in a surface electric field of the device (due to the “super-junction” effect). This effect reduces the electric field at the Schottky interface, lowering the leakage current and increasing the breakdown voltage of the TMBS device. This may be achieved by extending the depletion region for a given voltage into a semiconductor substrate, such as by merging two opposing depletion regions.
In conventional approaches, the TMBS devices are routinely fabricated as discrete devices normally included as an enhancement to discrete trench VDMOS devices, and multi-chip technology is used to connect the discrete device to a control integrated circuit. These types of multi-chip solutions often suffer from various problems, such as parasitic inductance. Also, Schottky devices often suffer from reverse leakage current, which is typically several orders of magnitude higher than the reverse leakage current for an equivalent area p-n junction. The barrier height of a metal layer in the Schottky devices typically plays a role in determining the amount of reduced voltage drop that can be traded off against increased leakage current. Typically, a metal layer with a lower barrier height may reduce forward voltage but may have higher leakage current. A metal layer with a higher barrier height may offer reduced leakage current but may have increased forward voltage. Increased leakage may also be due to sharp edges around the periphery of a metal plate that forms a contact for the Schottky device.